首款65nm端到端二值神经网络加速器,无需全精度计算
PiC-BNN: A 128-kbit 65 nm Processing-in-CAM-Based End-to-End Binary Neural Network Accelerator
- 基于内容寻址内存实现全链路二值化,仅用+1/-1计算
- 在MNIST上达95.2%准确率,吞吐560K次/秒,能效703M次/瓦
- 适合边缘设备部署,显著降低芯片面积与功耗
二值神经网络(BNN)将权重和激活限制为+1或-1,是传统神经网络的高效替代方案。然而,典型BNN虽对线性层进行二值化(矩阵-向量乘法),仍需以全精度实现批归一化、Softmax、输出层甚至卷积输入层,限制了面积与能耗优势,并需支持全精度运算的架构。本文提出PiC-BNN,一款基于内容寻址内存(CAM)的端到端二值化神经网络加速器,采用汉明距离容错机制,利用大数定律实现无需全精度操作的高精度分类。该芯片在商用65nm工艺下设计制造,对MNIST数据集实现95.2%的基准软件准确率,对手势识别(HG)数据集达93.5%,吞吐量560K次/秒,在分类二值MLP模型时能效达703M次/瓦。
原文摘要 · Abstract (English)
Binary Neural Networks (BNNs), where weights and activations are constrained to binary values (+1, -1), are a highly efficient alternative to traditional neural networks. Unfortunately, typical BNNs, while binarizing linear layers (matrix-vector multiplication), still implement other network layers (batch normalization, softmax, output layer, and sometimes the input layer of a convolutional neural network) in full precision. This limits the area and energy benefits and requires architectural support for full precision operations. We propose PiC-BNN, a true end-to-end binary in-approximate search (Hamming distance tolerant) Content Addressable Memory based BNN accelerator. PiC-BNN is designed and manufactured in a commercial 65nm process. PiC-BNN uses Hamming distance tolerance to apply the law of large numbers to enable accurate classification without implementing full precision operations. PiC-BNN achieves baseline software accuracy (95.2%) on the MNIST dataset and 93.5% on the Hand Gesture (HG) dataset, a throughput of 560K inferences/s, and presents a power efficiency of 703M inferences/s/W when implementing a binary MLP model for MNIST/HG dataset classification.
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