让脉冲网络与传统网络输出完全一致,实现能效提升万倍的精准转换。
NEXUS: Bit-Exact ANN-to-SNN Equivalence via Neuromorphic Gate Circuits with Surrogate-Free Training

- 用神经元门电路构建浮点运算,实现全精度数学等价。
- 在LLaMA-2 70B上零误差,平均误差仅6.19个单位。
- 无需代理梯度,抗膜电位泄漏和噪声,适合部署在类脑硬件。
脉冲神经网络(SNN)通过事件驱动稀疏性实现低功耗计算,但现有方法均以牺牲精度为代价,将连续值近似为离散脉冲。本文提出NEXUS框架,实现比特级精确的ANN到SNN等价——输出在数学上完全一致,而非近似。核心思想是利用纯积分发放(IF)神经元逻辑门构建所有算术操作,包括线性和非线性运算,实现符合IEEE-754标准的浮点数计算。通过空间位编码(理论上无编码误差)、分层类脑门电路(从基础逻辑门到完整Transformer层),以及无代理的STE训练(精确映射而非启发式逼近),NEXUS在机器精度范围内生成与标准人工神经网络完全相同的输出。在高达LLaMA-2 70B的模型上实验表明,任务准确率无损失(0.00%下降),平均单位可表示误差(ULP)仅为6.19,同时在类脑硬件上实现27至168,000倍的能效提升。关键优势在于空间位编码设计使系统对膜电位衰减(β∈[0.1,1.0])完全免疫,且在σ=0.2的突触噪声下仍保持超过98%的门级准确率。
原文摘要 · Abstract (English)
Spiking Neural Networks (SNNs) promise energy-efficient computing through event-driven sparsity, yet all existing approaches sacrifice accuracy by approximating continuous values with discrete spikes. We propose NEXUS, a framework that achieves bit-exact ANN-to-SNN equivalence -- not approximate, but mathematically identical outputs. Our key insight is constructing all arithmetic operations, both linear and nonlinear, from pure IF neuron logic gates that implement IEEE-754 compliant floating-point arithmetic. Through spatial bit encoding (zero encoding error by construction), hierarchical neuromorphic gate circuits (from basic logic gates to complete transformer layers), and surrogate-free STE training (exact identity mapping rather than heuristic approximation), NEXUS produces outputs identical to standard ANNs up to machine precision. Experiments on models up to LLaMA-2 70B demonstrate identical task accuracy (0.00% degradation) with mean ULP error of only 6.19, while achieving 27-168,000$\times$ energy reduction on neuromorphic hardware. Crucially, spatial bit encoding's single-timestep design renders the framework inherently immune to membrane potential leakage (100% accuracy across all decay factors $β\in[0.1,1.0]$), while tolerating synaptic noise up to $σ=0.2$ with >98% gate-level accuracy.
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