超轻量模型MicroBi-ConvLSTM仅11.4K参数，适配微型设备实时动作识别。
MicroBi-ConvLSTM: An Ultra-Lightweight Efficient Model for Human Activity Recognition on Resource Constrained Devices
- 两阶段卷积+4倍时间池化+单向双向LSTM，极简结构降参至11.4K
- 8个数据集平均93.4%宏F1，Pico 2平台量化后延迟72.8ms
- 唯一在双平台上实现全数据集覆盖的轻量模型，适合嵌入式部署
资源受限可穿戴设备上的动作识别需在精度与内存、计算预算间平衡。现有轻量级模型如TinierHAR（34K参数）和TinyHAR（55K参数）虽性能强，但考虑操作系统开销后仍超出微控制器有限SRAM容量。本文提出MicroBi-ConvLSTM，一种超轻量卷积循环架构，通过两阶段卷积特征提取与4倍时间池化，结合单个双向LSTM层，平均参数量降至11.4K，较TinierHAR减少2.9倍，较DeepConvLSTM减少11.9倍，同时保持线性O(N)复杂度。在8个多样化的HAR基准上评估显示，其表现优异：UCI-HAR宏F1达93.41%，SKODA装配手势94.46%，Daphnet步态冻结检测88.98%。消融实验表明，双向结构对偶发事件检测有益，但对周期性运动增益有限。在Raspberry Pi Pico 2与ESP32上实机部署验证了硬件可行性，支持INT8量化与FP32全精度路径。量化后，它是唯一在两个平台均实现8/8数据集全覆盖的架构，Pico 2平均延迟72.8ms；ESP32达到97.9% PyTorch一致性。全精度下所有成功配置均达100.0%一致，证实量化导致的性能下降仅为量化误差而非结构缺陷。
原文摘要 · Abstract (English)
Human Activity Recognition (HAR) on resource constrained wearables requires models that balance accuracy against strict memory and computational budgets. State of the art lightweight architectures such as TinierHAR (34K parameters) and TinyHAR (55K parameters) achieve strong accuracy, but exceed memory budgets of microcontrollers with limited SRAM once operating system overhead is considered. We present MicroBi-ConvLSTM, an ultra-lightweight convolutional recurrent architecture achieving 11.4K parameters on average through two stage convolutional feature extraction with 4x temporal pooling, and a single bidirectional LSTM layer. This represents 2.9x parameter reduction versus TinierHAR and 11.9x versus DeepConvLSTM while preserving linear O(N) complexity. Evaluation across eight diverse HAR benchmarks shows that MicroBi-ConvLSTM maintains competitive performance within the ultra-lightweight regime: 93.41% macro F1 on UCI-HAR, 94.46% on SKODA assembly gestures, and 88.98% on Daphnet gait freeze detection. Systematic ablation reveals task dependent component contributions where bidirectionality benefits episodic event detection, but provides marginal gains on periodic locomotion. On-device deployment on the Raspberry Pi Pico 2 and ESP32 validates hardware viability under both INT8 quantized and FP32 full-precision paths. Under INT8 quantization, MicroBi-ConvLSTM is the only architecture achieving full 8/8 dataset coverage on both platforms, with 72.8 ms average latency on Pico 2 and 97.9% PyTorch parity on ESP32. Under FP32 deployment, it achieves 100.0% parity on all successful configurations (8/8 Pico 2, 7/8 ESP32), confirming that all INT8 fidelity degradation is a quantization artifact rather than an architectural limitation.
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