用二值阈值替代非线性函数，实现超轻量级神经网络硬件加速。
BiKA: Kolmogorov-Arnold-Network-inspired Ultra Lightweight Neural Network Hardware Accelerator
- 用可学习的二值阈值代替KAN中的非线性函数，免去乘法运算。
- FPGA实测资源占用比二值化和量化加速器分别降低27.73%和51.54%。
- 适合资源受限的边缘设备，特别适合低功耗硬件部署场景。
轻量级神经网络加速器对资源与功耗受限的边缘设备至关重要。尽管量化和二值化能有效降低硬件开销，但仍依赖传统人工神经网络（ANN）计算模式。近期提出的柯尔莫哥洛夫-阿诺德网络（KAN）采用可学习的非线性函数构建新网络范式，但其硬件部署成本过高。受KAN启发，本文提出BiKA，一种无乘法器的架构：将非线性函数替换为可学习的二值阈值，仅需比较器和累加器即可实现计算。在Ultra96-V2 FPGA原型上测试显示，相比二值化与量化神经网络阵列加速器，BiKA分别减少27.73%和51.54%的硬件资源占用，同时保持良好精度。该设计为边缘设备上的硬件友好型神经网络提供了可行路径。
原文摘要 · Abstract (English)
Lightweight neural network accelerators are essential for edge devices with limited resources and power constraints. While quantization and binarization can efficiently reduce hardware cost, they still rely on the conventional Artificial Neural Network (ANN) computation pattern. The recently proposed Kolmogorov-Arnold Network (KAN) presents a novel network paradigm built on learnable nonlinear functions. However, it is computationally expensive for hardware deployment. Inspired by KAN, we propose BiKA, a multiply-free architecture that replaces nonlinear functions with binary, learnable thresholds, introducing an extremely lightweight computational pattern that requires only comparators and accumulators. Our FPGA prototype on Ultra96-V2 shows that BiKA reduces hardware resource usage by 27.73% and 51.54% compared with binarized and quantized neural network systolic array accelerators, while maintaining competitive accuracy. BiKA provides a promising direction for hardware-friendly neural network design on edge devices.
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