让AI精准定位芯片设计修改点，提升迭代效率。
RTLocating: Intent-aware RTL Localization for Hardware Design Iteration
- 基于意图的多视角融合方法，识别自然语言修改需求对应的代码块。
- 在工业级数据集上实现MRR 0.568、R@1达15.08%，性能领先超67%。
- 适合芯片设计工程师和AI辅助硬件开发研究者使用。
工业芯片开发高度依赖迭代，更倾向于局部化、意图驱动的更新而非重写整个RTL。然而现有大模型辅助硬件设计工作多聚焦于一次性合成，忽视了这一核心流程。本文首次形式化定义了ΔSpec到RTL的定位问题，即从自然语言变更请求（ΔSpec）映射到受影响的寄存器传输级（RTL）语法块，提出意图感知的RTLocating框架。该框架采用动态路由机制，自适应融合文本语义编码器、局部结构编码器与全局交互依赖编码器（GLIDE）的互补信息。为支持可扩展标注，构建了EvoRTL-Bench——首个基于OpenTitan Git历史的工业级意图-代码对齐基准，包含1,905个经验证的变更请求与13,583对ΔSpec-RTL块。在该数据集上，RTLocating取得0.568 MRR与15.08% R@1，较最强基线提升22.9%与67.0%，确立了演化硬件设计中意图驱动定位的新基准。
原文摘要 · Abstract (English)
Industrial chip development is inherently iterative, favoring localized, intent-driven updates over rewriting RTL from scratch. Yet most LLM-Aided Hardware Design (LAD) work focuses on one-shot synthesis, leaving this workflow underexplored. To bridge this gap, we for the first time formalize $Δ$Spec-to-RTL localization, a multi-positive problem mapping natural language change requests ($Δ$Spec) to the affected Register Transfer Level (RTL) syntactic blocks. We propose RTLocating, an intent-aware RTL localization framework, featuring a dynamic router that adaptively fuses complementary views from a textual semantic encoder, a local structural encoder, and a global interaction and dependency encoder (GLIDE). To enable scalable supervision, we introduce EvoRTL-Bench, the first industrial-scale benchmark for intent-code alignment derived from OpenTitan's Git history, comprising 1,905 validated requests and 13,583 $Δ$Spec-RTL block pairs. On EvoRTL-Bench, RTLocating achieves 0.568 MRR and 15.08% R@1, outperforming the strongest baseline by +22.9% and +67.0%, respectively, establishing a new state-of-the-art for intent-driven localization in evolving hardware designs.
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