提出低成本方法提升深度神经网络硬件加速器的可靠性与效率
PhD Thesis Summary: Methods for Reliability Assessment and Enhancement of Deep Neural Network Hardware Accelerators
- 构建系统性文献综述，识别可靠性评估短板并设计新工具
- 提出实时零开销增强技术AdAM，可靠性媲美冗余但成本更低
- 兼顾量化与近似计算，适合工业界部署高可靠AI芯片
本论文总结了博士研究工作，提出新颖且成本高效的深度神经网络（DNN）硬件加速器可靠性评估与增强方法。通过全面的系统性文献综述（SLR），对现有可靠性评估技术进行分类，识别研究空白，并推动开发新型分析型可靠性评估工具。同时，研究探索了可靠性、量化与近似计算之间的相互作用，提出优化计算效率与容错能力之间权衡的方法。此外，开发了一种实时、零开销的可靠性增强技术AdAM，其故障容错能力可媲美传统冗余方法，但显著降低硬件开销。该研究影响超越学术范畴，已应用于多个资助项目、硕士课程、产业合作及新工具与方法的开发，助力高效可靠的DNN硬件加速器设计。
原文摘要 · Abstract (English)
This manuscript summarizes the work and showcases the impact of the doctoral thesis by introducing novel, cost-efficient methods for assessing and enhancing the reliability of DNN hardware accelerators. A comprehensive Systematic Literature Review (SLR) was conducted, categorizing existing reliability assessment techniques, identifying research gaps, and leading to the development of new analytical reliability assessment tools. Additionally, this work explores the interplay between reliability, quantization, and approximation, proposing methodologies that optimize the trade-offs between computational efficiency and fault tolerance. Furthermore, a real-time, zero-overhead reliability enhancement technique, AdAM, was developed, providing fault tolerance comparable to traditional redundancy methods while significantly reducing hardware costs. The impact of this research extends beyond academia, contributing to multiple funded projects, masters courses, industrial collaborations, and the development of new tools and methodologies for efficient and reliable DNN hardware accelerators.
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