提出新型浮点架构，显著降低AI加速器的面积与功耗。
The AetherFloat Family: Block-Scale-Free Quad-Radix Floating-Point Architectures for AI Accelerators
- 采用基数4缩放和显式尾数设计，实现无延迟比较与零开销次正规数处理。
- 在乘累加单元中实现33.17%面积、21.99%功耗和11.73%关键路径延迟降低。
- 支持无需动态缩放硬件的推理，适合量化感知训练部署场景。
IEEE 754浮点标准虽是现代计算基础，但其隐藏前导位、基-2归一化和符号-大小编码结构在大规模并行神经处理器中带来显著硅面积与功耗开销。行业转向8位格式（如FP8 E4M3、OCP MX）后，块缩放（AMAX）逻辑成为必需，以防止大语言模型激活溢出导致精度下降。AetherFloat家族是一套从头设计的可参数化架构，专为软硬件协同设计优化。通过融合词典序一补码解码、四进制（基-4）缩放与显式尾数，AetherFloat实现零周期原生整数比较、无分支次正规数处理，并在乘累加单元中实现33.17%面积、21.99%总功耗及11.73%关键路径延迟降低。实例化为AetherFloat-8（AF8），采用纯显式3位尾数，结合基-4缩放，提供更宽动态范围，成为免块缩放的推理格式。创新的向量共享32位伽罗瓦随机舍入拓扑控制精度波动，缓解梯度消失问题。AF16作为bfloat16近似无损替代，而AF8则为量化感知训练优先的推理格式，牺牲动态AMAX硬件以换取部署时需量化感知微调。
原文摘要 · Abstract (English)
The IEEE 754 floating-point standard is the bedrock of modern computing, but its structural requirements -- a hidden leading bit, Base-2 bit-level normalization, and Sign-Magnitude encoding -- impose significant silicon area and power overhead in massively parallel Neural Processing Units (NPUs). Furthermore, the industry's recent shift to 8-bit formats (e.g., FP8 E4M3, OCP MX formats) has introduced a new hardware penalty: the strict necessity of Block-Scaling (AMAX) logic to prevent out-of-bound Large Language Model (LLM) activations from overflowing and degrading accuracy. The AetherFloat Family is a parameterizable architectural replacement designed from first principles for Hardware/Software Co-Design in AI acceleration. By synthesizing Lexicographic One's Complement Unpacking, Quad-Radix (Base-4) Scaling, and an Explicit Mantissa, AetherFloat achieves zero-cycle native integer comparability, branchless subnormal handling, and a verified 33.17% area, 21.99% total power, and 11.73% critical path delay reduction across the multiply-accumulate (MAC) unit. Instantiated as AetherFloat-8 (AF8), the architecture relies on a purely explicit 3-bit mantissa. Combined with Base-4 scaling, AF8 delivers a substantially wider dynamic range, acting as a ``Block-Scale-Free'' format for inference that circumvents dynamic scaling microarchitecture. Finally, a novel Vector-Shared 32-bit Galois Stochastic Rounding topology bounds precision variance while neutralizing the vanishing gradients that plague legacy formats. While AF16 serves as a near-lossless bfloat16 replacement via post-training quantization, AF8 is designed as a QAT-first inference format: its Block-Scale-Free property eliminates dynamic AMAX hardware at the cost of requiring quantization-aware fine-tuning for deployment.
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