用沃罗诺伊图增强概率电路，让模型更懂数据局部几何结构。
Geometry-Aware Probabilistic Circuits via Voronoi Tessellations
- 在概率电路的求和节点中引入沃罗诺伊图，显式建模数据局部几何。
- 提出近似推理框架，保证推断结果上下界，兼顾精度与效率。
- 设计可微松弛，支持梯度学习，适用于标准密度估计任务。
概率电路（PCs）能实现精确且高效的推断，但其混合权重与数据无关，难以捕捉数据流形的局部几何特征。本文提出将沃罗诺伊图（VT）作为自然方式，直接将几何结构融入PC的求和节点。然而，直接引入该结构会破坏可计算性。我们形式化了这种不相容性，并提出两种互补解决方案：(1) 一种近似推理框架，可提供推断结果的严格上下界；(2) 一个关于VT的结构条件，使得在该条件下可恢复精确可计算推断。最后，我们引入一种可微分松弛版本的VT，支持基于梯度的学习，并在标准密度估计任务上进行了实验验证。
原文摘要 · Abstract (English)
Probabilistic circuits (PCs) enable exact and tractable inference but employ data independent mixture weights that limit their ability to capture local geometry of the data manifold. We propose Voronoi tessellations (VT) as a natural way to incorporate geometric structure directly into the sum nodes of a PC. However, naïvely introducing such structure breaks tractability. We formalize this incompatibility and develop two complementary solutions: (1) an approximate inference framework that provides guaranteed lower and upper bounds for inference, and (2) a structural condition for VT under which exact tractable inference is recovered. Finally, we introduce a differentiable relaxation for VT that enables gradient-based learning and empirically validate the resulting approach on standard density estimation tasks.
Thank you to arXiv for use of its open access interoperability. PaperDance 不是 arXiv 官方产品；中文卡片由大模型生成，请以原文为准。