arXiv:2603.18066cs.NEcs.AI2026-03

将预测编码学习直接在硬件中实现,支持分布式在线学习。

A Synthesizable RTL Implementation of Predictive Coding Networks

  • 用硬件直接实现离散时间的预测编码更新,每层独立计算
  • 通过神经元钳位机制实现监督学习与推理,无需中央内存
  • 适合构建低功耗、可扩展的类脑计算系统

反向传播虽推动了现代深度学习的发展,但难以在在线、全分布式硬件系统中实现,因其依赖全局误差传播、阶段分离和集中式内存。预测编码提供了一种替代方案,使推断与学习通过相邻层间的局部预测误差动态自然产生。本文提出一种数字架构,可在硬件中直接实现离散时间的预测编码更新。每个神经核心独立维护活动值、预测误差与突触权重,仅通过硬连线连接与相邻层通信。通过统一的每神经元钳位原语支持监督学习与推断,该机制施加边界条件而保持内部更新规则不变。设计基于确定性的可综合RTL,围绕顺序乘累加数据路径和固定有限状态调度构建。系统不执行特定任务指令序列,而是依据固定的局部更新规则演化,任务结构通过连接性、参数与边界条件定义。本工作贡献并非新学习规则,而是一个完整的、可合成的数字底层,能直接在硬件中执行预测编码学习动力学。

原文摘要 · Abstract (English)

Backpropagation has enabled modern deep learning but is difficult to realize as an online, fully distributed hardware learning system due to global error propagation, phase separation, and heavy reliance on centralized memory. Predictive coding offers an alternative in which inference and learning arise from local prediction-error dynamics between adjacent layers. This paper presents a digital architecture that implements a discrete-time predictive coding update directly in hardware. Each neural core maintains its own activity, prediction error, and synaptic weights, and communicates only with adjacent layers through hardwired connections. Supervised learning and inference are supported via a uniform per-neuron clamping primitive that enforces boundary conditions while leaving the internal update schedule unchanged. The design is a deterministic, synthesizable RTL substrate built around a sequential MAC datapath and a fixed finite-state schedule. Rather than executing a task-specific instruction sequence inside the learning substrate, the system evolves under fixed local update rules, with task structure imposed through connectivity, parameters, and boundary conditions. The contribution of this work is not a new learning rule, but a complete synthesizable digital substrate that executes predictive-coding learning dynamics directly in hardware.

神经形态计算预测编码硬件实现

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