研究SNN超参数如何影响硬件性能，发现选对梯度函数和神经元模型能显著降低延迟。
Surrogates, Spikes, and Sparsity: Performance Analysis and Characterization of SNN Hyperparameters on Hardware
- 通过分析梯度函数与神经元模型对稀疏性的影
- 换用Lapicque神经元可降低28%推理延迟
- 适合做低功耗SNN硬件优化的研究者
脉冲神经网络（SNN）通过稀疏事件驱动计算实现低功耗推理，但其理论能效优势常因训练超参数与实际硬件性能之间关系不透明而难以体现。本文针对训练超参数——特别是替代梯度函数和神经元模型配置——对硬件级激活稀疏性的影响展开工作负载表征研究。在三个事件视觉数据集（DVS128-Gesture、N-MNIST、DVS-CIFAR10）上，分析了快速符号函数（Fast Sigmoid）与脉冲率逃逸（Spike Rate Escape）等梯度函数，以及LIF与拉皮克（Lapicque）神经元模型的性能。结果表明，标准准确率指标无法有效预测硬件效率：尽管Fast Sigmoid在DVS-CIFAR10上表现最优，但Spike Rate Escape在DVS128-Gesture上可将延迟降低12.2%且准确率损失极小；将神经元模型从LIF改为Lapicque，延迟最高可减少28%。在定制的周期精确FPGA平台验证中，采用感知稀疏性的超参数选择使准确率提升9.1%，延迟降低超过2倍。该研究建立了从训练参数预测硬件行为的方法。代码与复现材料见https://zenodo.org/records/18893738。
原文摘要 · Abstract (English)
Spiking Neural Networks (SNNs) offer inherent advantages for low-power inference through sparse, event-driven computation. However, the theoretical energy benefits of SNNs are often decoupled from real hardware performance due to the opaque relationship between training-time choices and inference-time sparsity. While prior work has focused on weight pruning and compression, the role of training hyperparameters -- specifically surrogate gradient functions and neuron model configurations -- in shaping hardware-level activation sparsity remains underexplored. This paper presents a workload characterization study quantifying the sensitivity of hardware latency to SNN hyperparameters. We decouple the impact of surrogate gradient functions (e.g., Fast Sigmoid, Spike Rate Escape) and neuron models (LIF, Lapicque) on classification accuracy and inference efficiency across three event-based vision datasets: DVS128-Gesture, N-MNIST, and DVS-CIFAR10. Our analysis reveals that standard accuracy metrics are poor predictors of hardware efficiency. While Fast Sigmoid achieves the highest accuracy on DVS-CIFAR10, Spike Rate Escape reduces inference latency by up to 12.2% on DVS128-Gesture with minimal accuracy trade-offs. We also demonstrate that neuron model selection is as critical as parameter tuning; transitioning from LIF to Lapicque neurons yields up to 28% latency reduction. We validate on a custom cycle-accurate FPGA-based SNN instrumentation platform, showing that sparsity-aware hyperparameter selection can improve accuracy by 9.1% and latency by over 2x compared to baselines. These findings establish a methodology for predicting hardware behavior from training parameters. The RTL and reproducibility artifacts are at https://zenodo.org/records/18893738.
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