用脉冲神经网络与动态图像处理器在FPGA上实现低延迟目标检测
AceleradorSNN: A Neuromorphic Cognitive System Integrating Spiking Neural Networks and DynamicImage Signal Processing on FPGA
- 基于脉冲神经网络处理动态视觉传感器的异步数据
- 在FPGA上实现实时流式图像信号处理,延迟低于10毫秒
- 适合自动驾驶、无人机等对能效和速度要求高的场景
自主系统(如高级驾驶辅助系统、无人机、工业4.0机器人)对高速、低延迟、低功耗的目标检测需求,暴露了传统卷积神经网络(CNNs)的局限性。为此,我们开发了AceleradorSNN,第三代人工智能认知系统。该架构集成基于脉冲神经网络(SNNs)的类脑处理单元(NPU),用于处理动态视觉传感器(DVS)的异步数据,同时配备可动态重构的认知图像信号处理器(ISP),用于处理RGB摄像头数据。本文详细介绍了两个IP核的硬件设计、替代梯度训练的SNN主干网络评估,以及在现场可编程门阵列(FPGA)上实现的实时流式ISP架构。
原文摘要 · Abstract (English)
The demand for high-speed, low-latency, and energy-efficient object detection in autonomous systems -- such as advanced driver-assistance systems (ADAS), unmanned aerial vehicles (UAVs), and Industry 4.0 robotics -- has exposed the limitations of traditional Convolutional Neural Networks (CNNs). To address these challenges, we have developed AceleradorSNN, a third-generation artificial intelligence cognitive system. This architecture integrates a Neuromorphic Processing Unit (NPU) based on Spiking Neural Networks (SNNs) to process asynchronous data from Dynamic Vision Sensors (DVS), alongside a dynamically reconfigurable Cognitive Image Signal Processor (ISP) for RGB cameras. This paper details the hardware-oriented design of both IP cores, the evaluation of surrogate-gradienttrained SNN backbones, and the real-time streaming ISP architecture implemented on Field-Programmable Gate Arrays (FPGA).
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