用代理模型提升3D芯片布局的PPA表现，效果显著且更省评估成本。
A PPA-Driven 3D-IC Partitioning Selection Framework with Surrogate Models
- 基于最优实验设计构建代理模型，直接以真实PPA为目标优化。
- 在8个3D芯片设计上平均提升9.99%布线拥塞、21.85%时序延迟。
- 仅需评估少量候选方案，即可媲美全量评估结果，适合工业级部署。
3D-IC网表划分通常依赖代理目标进行优化，而最终的PPA（功耗-性能-面积）被视为高成本评估而非优化信号。这种代理驱动范式难以将额外的PPA评估转化为实际的性能改进。为此，我们提出DOPP（D-Optimal PPA-driven partitioning selection）框架，弥合代理指标与真实PPA之间的差距。在八个3D-IC设计上，该框架相比Open3DBench实现了平均9.99%的布线拥塞降低、7.87%的布线长度减少、7.75%的WNS改善、21.85%的TNS降低以及1.18%的功耗下降。与对全部候选解进行穷举评估相比，DOPP仅需评估极小部分候选方案，便能达到相近的最佳PPA结果，显著降低评估开销。通过并行化评估，该方法在保持与传统基线相当的墙钟时间的同时实现上述优势。
原文摘要 · Abstract (English)
3D-IC netlist partitioning is commonly optimized using proxy objectives, while final PPA is treated as a costly evaluation rather than an optimization signal. This proxy-driven paradigm makes it difficult to reliably translate additional PPA evaluations into better PPA outcomes. To bridge this gap, we present DOPP (D-Optimal PPA-driven partitioning selection), an approach that bridges the gap between proxies and true PPA metrics. Across eight 3D-IC designs, our framework improves PPA over Open3DBench (average relative improvements of 9.99% congestion, 7.87% routed wirelength, 7.75% WNS, 21.85% TNS, and 1.18% power). Compared with exhaustive evaluation over the full candidate set, DOPP achieves comparable best-found PPA while evaluating only a small fraction of candidates, substantially reducing evaluation cost. By parallelizing evaluations, our method delivers these gains while maintaining wall-clock runtime comparable to traditional baselines.
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