用高维计算实现低功耗设备端持续学习，兼顾速度与能效。
ImageHD: Energy-Efficient On-Device Continual Learning of Visual Representations via Hyperdimensional Computing
- 基于高维计算实现无迭代在线更新，降低算力需求。
- 在CORe50数据集上比CPU快40.4倍，能效提升383倍。
- 适合资源受限的边缘设备，尤其对实时视觉任务友好。
设备端持续学习对处理非平稳数据流的边缘AI系统至关重要，但现有方法多依赖反向传播或大量样本分类器，带来显著的计算、内存和延迟开销。高维计算（HDC）通过快速、非迭代的在线更新提供轻量级替代方案。结合紧凑的卷积神经网络特征提取器，HDC可在保持强视觉表征的同时实现高效设备端适应。然而，以往基于HDC的持续学习系统常依赖多级存储层次和复杂聚类管理，限制了在资源受限硬件上的部署。本文提出ImageHD，一种基于HDC的现场可编程门阵列（FPGA）加速器，专为严格时延与片上内存约束下的流式持续学习设计，避免昂贵的迭代优化。算法层面，引入面向硬件的持续学习方法，通过统一样本内存和高效聚类合并策略限制类别样本数量，并集成量化CNN前端以降低部署开销而不损失精度。系统层面，ImageHD在AMD Zynq ZCU104 FPGA上实现流式数据流架构，整合HDC编码、相似性搜索与受限聚类管理，采用字打包二进制超向量，在紧约束片上资源下实现大规模并行位运算。在CORe50数据集上，ImageHD相较优化后的CPU（GPU）基线分别实现最高40.4倍（4.84倍）加速与383倍（105.1倍）能效提升，验证了HDC支持的持续学习在实时边缘AI中的可行性。
原文摘要 · Abstract (English)
On-device continual learning (CL) is critical for edge AI systems operating on non-stationary data streams, but most existing methods rely on backpropagation or exemplar-heavy classifiers, incurring substantial compute, memory, and latency overheads. Hyperdimensional computing (HDC) offers a lightweight alternative through fast, non-iterative online updates. Combined with a compact convolutional neural network (CNN) feature extractor, HDC enables efficient on-device adaptation with strong visual representations. However, prior HDC-based CL systems often depend on multi-tier memory hierarchies and complex cluster management, limiting deployability on resource-constrained hardware. We present ImageHD, an FPGA accelerator for on-device continual learning of visual data based on HDC. ImageHD targets streaming CL under strict latency and on-chip memory constraints, avoiding costly iterative optimization. At the algorithmic level, we introduce a hardware-aware CL method that bounds class exemplars through a unified exemplar memory and a hardware-efficient cluster merging strategy, while incorporating a quantized CNN front-end to reduce deployment overhead without sacrificing accuracy. At the system level, ImageHD is implemented as a streaming dataflow architecture on the AMD Zynq ZCU104 FPGA, integrating HDC encoding, similarity search, and bounded cluster management using word-packed binary hypervectors for massively parallel bitwise computation within tight on-chip resource budgets. On CORe50, ImageHD achieves up to 40.4x (4.84x) speedup and 383x (105.1x) energy efficiency over optimized CPU (GPU) baselines, demonstrating the practicality of HDC-enabled continual learning for real-time edge AI.
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