用知识图谱找模型压缩的临界点,精准匹配电路分析难度
Complexity Horizons of Compressed Models in Analog Circuit Analysis

- 构建电路知识前置关系图,定位模型能力边界
- 实验显示压缩模型在复杂电路任务中性能断崖式下降
- 适合需要高效部署LLM的硬件设计工程师
将大语言模型(LLM)用于电路分析时,常面临推理准确率与计算效率的权衡。传统评估方法将模型性能视为单一指标,忽略了工程知识的层级结构。本文提出一种感知性能的模型压缩策略,利用前提依赖图(prerequisite graphs)优化电路分析任务中的模型选择。通过将电子设计概念建模为有向无环图(DAG),可识别出压缩后模型在不同复杂度电路分析中的能力极限。框架包含基于前提生成数据集的智能体流水线,以及动态跨压缩版本查询的评估引擎,能选出在特定知识边界下最小的合适模型。在模拟电路数据集上的实验表明,前提图可提供模型压缩与性能之间的细粒度映射,明确不同复杂度下的性能拐点。
原文摘要 · Abstract (English)
The deployment of Large Language Models (LLMs) for specialized engineering domains, such as circuit analysis, often faces a trade-off between reasoning accuracy and computational efficiency. Traditional evaluation methods treat model performance as a flat metric, failing to account for the hierarchical nature of engineering knowledge. We propose a performance-aware model compression strategy that utilizes prerequisite graphs to optimize model selection for circuit analysis tasks. By structuring electronics design concepts as Directed Acyclic Graphs (DAGs), we can identify the specific complexity horizons of an LLM's compressed variants' tiers. Our framework introduces an agentic pipeline for generating prerequisite-based datasets and a strategic evaluation engine that dynamically cascades queries across a spectrum of compressed variants of an LLM. This approach allows to select the smallest compressed model, given its conceptual knowledge boundaries in circuit analysis. Experimental results on analog electronics datasets demonstrate that prerequisite graphs provide a granular map of model compression with respect to the performance given circuit analysis complexity. (Source Code: https://github.com/pacomesimon/LLM_prereq_graphs_circuit_analysis, Demo: https://huggingface.co/spaces/pacomesimon/LLM_prereq_graphs_circuit_analysis)
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