教大模型生成高效向量化代码，超越编译器优化。
AutoVecCoder: Teaching LLMs to Generate Explicitly Vectorized Code
- 用数据合成+强化学习，让大模型掌握硬件指令细节
- 在SimdBench上优于传统-O3优化，部分任务提速超1.5倍
- 适合想提升计算性能的系统级开发者
通过单指令多数据（SIMD）架构实现向量化是高性能计算的核心。为充分挖掘硬件潜力，开发者常采用显式向量化（使用内建函数），因为基于编译器的自动向量化因保守的静态分析常效果不佳。尽管大语言模型（LLMs）在通用代码生成方面表现优异，但在显式向量化上受限于高质量语料稀缺及底层硬件指令的严格语义约束。本文提出AutoVecCoder，一种新框架，旨在赋予LLMs自动化显式向量化能力。该框架包含两个核心组件：VecPrompt——用于注入领域特定内建知识的自动化数据合成管道；以及VecRL——一种与执行效率对齐的强化学习框架。使用该框架训练的AutoVecCoder-8B模型，在SimdBench的SSE和AVX子集上达到当前最优性能，某些场景下生成的代码甚至超越标准-O3优化，有效克服了传统自动向量化固有的瓶颈。
原文摘要 · Abstract (English)
Vectorization via Single Instruction, Multiple Data (SIMD) architectures is a cornerstone of high-performance computing. To fully exploit hardware potential, developers often resort to explicit vectorization using intrinsics, as compiler-based auto-vectorization frequently yields suboptimal results due to conservative static analysis. While Large Language Models (LLMs) have demonstrated remarkable proficiency in general code generation, they struggle with explicit vectorization due to the scarcity of high-quality corpora and the strict semantic constraints of low-level hardware instructions. In this paper, we propose AutoVecCoder, a novel framework designed to empower LLMs with the capability of automated explicit vectorization. AutoVecCoder integrates two core components: VecPrompt, an automated data synthesis pipeline to inject domain-specific intrinsic knowledge; and VecRL, a reinforcement learning framework that aligns code generation with execution efficiency. AutoVecCoder-8B trained by this framework achieves state-of-the-art performance on the SSE and AVX subsets of SimdBench and, in some cases, generates implementations surpassing standard -O3 optimizations, effectively overcoming the inherent bottlenecks of traditional automated vectorization.
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