用大模型多智能体系统自动设计可部署的微型AI模型，省时高效。
AutoMCU: Feasibility-First MCU Neural Network Customization via LLM-based Multi-Agent Systems
- 通过大模型生成架构并结合硬件反馈实时淘汰不可行方案
- 在严格内存约束下实现1-2小时完成定制，精度媲美传统方法
- 适合需要快速落地边缘智能的开发者和嵌入式工程师
在微控制器（MCU）上部署神经网络对边缘智能至关重要，但受限于内存、存储和计算资源，仍面临挑战。现有方法如模型压缩和硬件感知神经架构搜索（HW-NAS）常依赖代理指标，搜索成本高，且未能充分弥合架构设计与实际部署之间的差距。本文提出AutoMCU，一种基于大语言模型（LLM）的多智能体系统，实现面向MCU约束的可行性优先的神经网络自动化定制。给定自然语言任务需求和硬件规格，AutoMCU通过迭代生成结构化架构候选，利用厂商工具链反馈在训练前过滤不可行设计，在受控协议下评估可行模型，并通过后端驱动的部署分析验证可部署性。其包含两大机制：1）硬件在回路的架构生成，提前剔除违反RAM和Flash限制的设计；2）状态隔离的多智能体调度，稳定协调设计、训练、评估与部署各阶段。在CIFAR-10和CIFAR-100上严格MCU约束下的实验表明，AutoMCU在约1–2小时内达成具有竞争力的精度，相比代表性MCU导向的HW-NAS基线节省数百GPU小时。与ColabNAS及基于LLM的NAS方法GENIUS在NAS-Bench-201上的对比进一步验证了AutoMCU的有效性与稳定性。多个STM32微控制器的真实设备部署验证了其在MCU级边缘智能中的实用性。
原文摘要 · Abstract (English)
Deploying neural networks on microcontroller units (MCUs) is critical for edge intelligence but remains challenging due to tight memory, storage, and computation constraints. Existing approaches, such as model compression and hardware-aware neural architecture search (HW-NAS), often depend on proxy metrics, incur high search cost, and do not fully bridge the gap between architecture design and verified deployment. This paper presents AutoMCU, a feasibility-first large language model (LLM)-based multi-agent system for automated neural network customization under MCU constraints. Given natural-language task requirements and hardware specifications, AutoMCU iteratively generates structured architecture candidates, filters infeasible designs through vendor toolchain feedback before training, evaluates feasible models under a controlled protocol, and verifies deployability through backend-grounded deployment analysis. AutoMCU includes two key mechanisms: 1) hardware-in-the-loop architecture generation for early elimination of undeployable candidates under RAM and Flash constraints, and 2) state-isolated multi-agent scheduling for stable coordination of proposal, training, evaluation, and deployment stages. Experiments on CIFAR-10 and CIFAR-100 under strict MCU constraints show that AutoMCU achieves competitive accuracy while reducing customization time to about 1--2 hours, compared with hundreds of GPU hours for representative MCU-oriented HW-NAS baselines. Comparisons with ColabNAS and the LLM-based NAS method GENIUS on NAS-Bench-201 further demonstrate the effectiveness and stability of AutoMCU. Real-device deployments on multiple STM32 microcontrollers validate its practical applicability to MCU-scale edge intelligence.
Thank you to arXiv for use of its open access interoperability. PaperDance 不是 arXiv 官方产品；中文卡片由大模型生成，请以原文为准。