融合代码与图结构,提升硬件设计表示的鲁棒性。
UniRTL: Unifying Code and Graph for Robust RTL Representation Learning

- 联合代码与控制数据流图进行多模态预训练
- 在性能预测和代码检索任务中超越现有方法
- 适合硬件自动化与芯片设计方向的研究者
针对寄存器传输级(RTL)设计的高效表征学习对加速硬件设计流程至关重要。现有方法通常仅依赖单一模态——代码或图结构表示,限制了表征的表达力与泛化能力。对于RTL而言,控制数据流图(CDFG)提供了完整的结构信息,而代码则显式编码语义与功能信息。本文提出UniRTL,一种通过联合利用代码与CDFG的多模态预训练框架,实现统一的RTL表征学习。UniRTL通过相互掩码建模实现代码与图的细粒度对齐,并采用分层训练策略,先使用预训练的图感知分词器,再逐步对齐文本(功能摘要)与代码,最后整合图结构。我们在性能预测与代码检索两个下游任务上评估UniRTL,在多种设置下均优于先前方法,验证其作为硬件设计自动化更强基础模型的有效性。
原文摘要 · Abstract (English)
Developing effective representations for register transfer level (RTL) designs is crucial for accelerating the hardware design workflow. Existing approaches, however, typically rely on a single data modality, either the RTL code or its associated graph-based representation, limiting the expressiveness and generalization ability of the learned representations. For RTL, the control data flow graph (CDFG) offers a comprehensive structural representation that preserves complete information, while the code modality explicitly encodes semantic and functional information. We argue that integrating these complementary modalities is essential for a thorough understanding of RTL designs. To this end, we propose UniRTL, a multimodal pretraining framework that learns unified RTL representations by jointly leveraging code and CDFG. UniRTL achieves fine-grained alignment between code and graph through mutual masked modeling and employs a hierarchical training strategy that incorporates a pretrained graph-aware tokenizer and staged alignment of text (i.e., functional summary) and code prior to graph integration. We evaluate UniRTL on two downstream tasks, performance prediction and code retrieval, under multiple settings. Experimental results show that UniRTL consistently outperforms prior methods, establishing it as a more robust and powerful foundation for advancing hardware design automation.
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