用大模型从代码直接估算CPU模块功耗，省去仿真环节。
BigPower: Hierarchical Source-Level Module Power Estimation for CPUs with Large Language Models
- 基于大模型和架构层次，从源码推导功耗
- 在开源香山处理器上实现跨配置精准估测
- 适合芯片设计阶段快速评估功耗，替代仿真
精确的功耗估算是理解与优化CPU功耗行为的关键，但实际流程常依赖仿真数据或流片后分析。本文提出BigPower，一种分层的源码级代理模型，可在CPU设计阶段实现细粒度模块级功耗估算。该模型利用大语言模型表征，结合架构层级、模块连接关系、配置参数及工作负载上下文，直接从源码级设计信息预测模块功耗，推理时无需额外仿真。在开源香山处理器系列上的实验表明，BigPower能在多种配置和工作负载下实现高效、精准的细粒度功耗估计，为传统仿真工作流提供高效替代方案。
原文摘要 · Abstract (English)
Accurate power estimation is important for understanding and optimizing CPU power behavior, yet practical workflows often rely on simulation-derived information or post-silicon analysis. In this work, we present BigPower, a hierarchical source-level surrogate model for fine-grained module-level power estimation during CPU design. BigPower leverages large language model-based representations together with architectural hierarchy, module connectivity, configuration parameters, and workload context to estimate module-level power consumption directly from source-level design information, without requiring additional simulation during inference. Experimental results in the open-source XiangShan processor family demonstrate practical fine-grained power estimation across diverse configurations and workloads, offering an efficient alternative to conventional simulation-based workflows.
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