arXiv:2606.22180cs.DCcs.LG2026-06

通过反馈机制动态优化采样,显著提升大规模图嵌入的效率与通信性能。

FeLoG: Scalable and Efficient Distributed Graph Embedding with Feedback Loop Mechanism

论文配图:FeLoG: Scalable and Efficient Distributed Graph Embedding with Feedback Loop Mechanism
图 1 · 摘自论文原文
  • 引入反馈耦合采样,优先训练低质量节点,减少冗余计算。
  • 实验显示平均提速27.9倍,通信开销降低超53.1%,资源利用率超80%。
  • 适合需要高效分布式图嵌入的推荐系统、反欺诈等场景。

图嵌入将图节点映射为低维向量,支持推荐、欺诈检测及基于图的检索增强生成(GraphRAG)等应用。随着图规模扩展至数十亿边,可扩展且高效的图嵌入变得至关重要。现有框架普遍采用采样-训练范式,即通过采样节点及其邻居构建小批量数据。然而,采样与嵌入质量演化通常解耦,导致对已充分训练区域重复探索,而对未充分训练节点采样不足。在系统层面,这种解耦进一步引发过度通信、串行执行和资源利用率低下问题。本文提出FeLoG,一种基于反馈环的可扩展分布式图嵌入系统:(1) 引入反馈耦合采样与训练,根据实时嵌入质量反馈动态优先处理未充分训练节点,减少冗余计算并加速收敛;(2) 采用活动感知通信机制,压缩高频出现的节点序列以降低机内PCIe通信开销,并选择性同步频繁更新的嵌入以减少跨机通信;(3) 采用轮次交错流水线,将下一轮采样与当前轮训练重叠执行,提升CPU-GPU利用率。在大规模图上对比六种前沿基线方法的实验表明,FeLoG实现平均27.9倍加速,通信成本降低超过53.1%,并维持超过80%的CPU-GPU利用率。

原文摘要 · Abstract (English)

Graph embedding maps graph nodes into low-dimensional vectors to support applications such as recommendation, fraud detection, and graph-based retrieval-augmented generation (GraphRAG). As graphs scale to billions of edges, scalable and efficient graph embedding has become increasingly important. Existing frameworks commonly adopt a sampling-training paradigm, in which mini-batches are constructed by sampling nodes and their neighbors. However, sampling is typically decoupled from evolving embedding quality, causing redundant exploration of well-trained regions while under-sampling undertrained nodes. At the system level, such decoupling further leads to excessive communication, serialized execution, and low resource utilization in distributed environments. We present FeLoG, a feedback loop-driven system for scalable distributed graph embedding. (1) FeLoG introduces feedback-coupled sampling and training, dynamically prioritizing undertrained nodes according to real-time embedding-quality feedback, thereby reducing redundant computation and accelerating convergence. (2) It employs activity-aware communication that compresses frequently occurring node sequences to reduce intra-machine PCIe traffic and selectively synchronizes frequently updated embeddings to reduce inter-machine communication. (3) It adopts a round-interleaved pipeline that overlaps next-round sampling with current-round training to improve CPU-GPU utilization. Experiments against six state-of-the-art baselines on large-scale graphs show that FeLoG achieves an average speedup of 27.9x, reduces communication cost by more than 53.1%, and sustains over 80% CPU-GPU utilization.

图嵌入分布式系统反馈机制高效训练

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