arXiv:2606.31695cs.CV2026-06中稿 · ed

提出无需批归一化的稳定脉冲网络,提升精度与硬件效率

Intrinsically Stable Spiking Neural Networks: Overcoming the Performance Barrier in the Absence of Batch Normalization

论文配图:Intrinsically Stable Spiking Neural Networks: Overcoming the Performance Barrier in the Absence of Batch Normalization
图 1 · 摘自论文原文
  • 通过拓扑感知权重标准化和改进残差连接实现信号自稳态
  • ImageNet上达68.05%准确率,超越以往无归一化模型
  • 显著降低FPGA资源消耗,适合部署于神经形态硬件

深度脉冲神经网络(SNN)的性能通常依赖于批归一化(BN)。然而,先进动态BN变体引入运行时乘法操作,削弱了SNN的硬件效率优势。本文发现,严重的放电率衰减是无归一化SNN性能下降的主要原因。基于此,提出内在稳定的SNN(IS-SNN)架构,通过拓扑感知权重标准化和改进残差连接强制信号稳态,移除激活归一化层。标准化操作在离线阶段融入静态权重,避免运行时统计追踪与乘法,恢复累积导向的推理路径。实验表明,IS-SNN在VGG、ResNet和Transformer模型上性能媲美甚至优于计算开销大的动态BN方法。尤其在ImageNet上达到68.05%的准确率,突破以往无归一化方法的深度瓶颈。同时,神经元实现的FPGA查找表资源消耗降低96.4%,验证其作为高精度、硬件友好深度神经形态系统框架的可行性。

原文摘要 · Abstract (English)

The performance of deep spiking neural networks (SNNs) often relies on batch normalization (BN). However, the advanced dynamic BN variants used in state-of-the-art models introduce runtime multiplications, which weaken the hardware-efficiency motivation of SNNs. To address this tension, we identify catastrophic firing-rate decay as a primary cause of severe performance degradation in normalization-free SNNs. Guided by this insight, this work proposes the Intrinsically Stable SNN (IS-SNN) architecture, which removes activation-normalization layers by enforcing signal homeostasis through topology-aware weight standardization and modified residual connections. By folding the standardization operations into static weights offline, IS-SNN removes the runtime statistics tracking and multiplications introduced by activation normalization, restoring an accumulation-oriented inference datapath. Comprehensive experiments show that IS-SNN achieves performance competitive with or superior to computationally expensive dynamic BN techniques across VGG, ResNet, and Transformer-based models. Notably, it achieves a competitive accuracy of 68.05\% on ImageNet and overcomes the severe depth limitations of prior BN-free attempts. Together with a 96.4\% reduction in FPGA lookup table resource consumption for neuron implementations, these results support IS-SNN as a practical framework for building accurate and hardware-friendly deep neuromorphic systems.

脉冲神经网络硬件效率无归一化神经形态计算

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