动态感知故障容错框架，让FPGA加速器在低开销下保持高可靠性。
ProWAFT: A ROMA-LPD Instance for Workload-Aware and Dynamic Fault Tolerance in FPGA-Based CNN Accelerators
- 根据任务负载动态选择性启用部分冗余，降低资源消耗
- 在500个任务上实现接近基线的吞吐率，故障容忍率超98%
- 适合边缘计算中对能效与可靠性要求高的CNN推理场景
基于SRAM的FPGA为网络边缘的卷积神经网络（CNN）推理提供了节能、低延迟的平台，但瞬态故障可能导致无声错误，影响可靠性。持续冗余（如全三重模冗余，TMR）虽能保证正确性，却带来显著性能和能耗开销；而反应式恢复可能造成关键路径延迟过高。本文提出ProWAFT，一种面向FPGA CNN加速器的主动式负载感知故障容错框架，利用部分重配置技术，在可重构区域中选择性应用TMR。ProWAFT量化任务关键性，建模故障传播与重配置开销，优化延迟、能耗与可靠性风险的综合成本。在Xilinx Zynq UltraScale+ ZCU104平台（6个可重构区域）上评估，基于ResNet-18、MobileNetV2和EfficientNet-Lite的500任务轨迹，结合时变单粒子翻转（SEU）注入，ProWAFT在综合成本上优于静态TMR与反应式重配置，同时保持高任务成功率与近基线吞吐率，且在线决策开销极低。
原文摘要 · Abstract (English)
SRAM-based FPGAs provide an attractive platform for energy- and latency-constrained CNN inference at the network edge, yet transient faults can lead to silent errors that compromise reliability. Always-on redundancy (e.g., full TMR) improves correctness but incurs substantial performance and energy overhead, while reactive recovery may introduce unacceptable latency on the critical path. We propose \textbf{ProWAFT}, a proactive workload-aware fault-tolerance framework for FPGA-based CNN accelerators that uses partial reconfiguration to selectively apply TMR across reconfigurable partitions. ProWAFT quantifies workload criticality, models fault propagation and reconfiguration overhead, and selects configurations that minimize a composite objective over latency, energy, and reliability risk. Implemented on a Xilinx Zynq UltraScale+ ZCU104 platform with six reconfigurable regions and evaluated on a 500-task trace derived from ResNet-18, MobileNetV2, and EfficientNet-Lite under time-varying SEU injection, ProWAFT achieves lower composite cost than static TMR and reactive reconfiguration while maintaining high task success rate and near-baseline throughput with low online decision overhead.
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