将电路网表转为可读原理图，且能100%验证连接正确性。
Weave: Verified Netlist-to-Schematic Conversion via Layered Graph Layout
- 用分层布局算法生成原理图，确保图形与原始连接一致。
- 通过反向解析比对网表，实现100%连接等价验证。
- 适合需要精确连接保障的硬件设计人员使用。
将SPICE网表转换为可读原理图是电子设计自动化中的长期难题：模拟器和机器学习流程可轻松生成网表，但设计师仍依赖图表理解电路。现有基于学习的方法虽能概率生成原理图，却无法保证连接正确性，且随电路规模增大准确率急剧下降。本文提出Weave，一种确定性转换器，利用分层（Sugiyama风格）图布局将SPICE网表转为LTspice .asc格式原理图，并通过往返连接校验进行逐项认证：生成的原理图重新解析为网表后，与输入网表逐网比对，仅当两者完全一致时才视为正确，提供二元正确性证明而非相似度评分。Weave为独立客户端工具，无需依赖，内置5093个LTspice符号引脚表。在与先进大模型转换器Schemato相同的公开测试集（117个电路，由LTspice自动生成网表）上，Weave实现100%编译通过率和100%往返验证连接等价性，而Schemato报告编译通过率仅76%，图编辑距离相似度为0.35；尤其值得注意的是，该数据集中73%的电路超过五元件阈值，而在此阈值后Schemato的连接准确性显著下降。在更大更难的官方Analog Devices LTspice演示集（共3460个可网表化电路）中，Weave成功验证88.4%电路的精确连接关系，其余失败集中于一类密集多引脚电源模块。
原文摘要 · Abstract (English)
Converting a SPICE netlist into a human-readable schematic is a longstanding problem in electronic design automation: simulators and machine-learning pipelines readily produce netlists, but designers reason about circuits through diagrams. Recent learning-based approaches translate netlists into schematics probabilistically, yet they provide no guarantee that the generated drawing preserves the original connectivity, and their accuracy degrades sharply as circuits grow. We present Weave, a deterministic converter that turns a SPICE netlist into an LTspice .asc schematic using a layered (Sugiyama-style) graph layout, and that certifies every output by a round-trip connectivity check: the generated schematic is re-parsed into a netlist and compared, net for net, against the input. A result is reported as correct only when the two partitions are identical, giving a binary correctness certificate rather than a similarity score. Weave runs entirely client-side as a single dependency-free file and embeds a pin table for 5093 LTspice symbols. On the identical public Circuits-LTSpice test set used by the state-of-the-art LLM converter Schemato (117 circuits, netlisted with LTspice itself), Weave achieves 100% compilation and 100% round-trip-verified connectivity equivalence, compared with Schemato's reported 76% compilation and a graph-edit-distance similarity of 0.35; notably, 73% of that set exceeds the five-component threshold beyond which Schemato reports losing connectivity accuracy. On a larger and harder corpus, the 3460 netlistable circuits of the official Analog Devices LTspice demo collection, Weave verifies exact connectivity for 88.4% of circuits, with the remaining failures concentrated in a single, well-characterized class of dense multi-pin power modules.
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