用大模型让芯片前端设计自动执行，提升效率与智能水平
LLM for EDA in Front-End Design: Challenges and Opportunities
- 将大模型作为统一接口，实现从规格到电路、测试平台的自动生成
- 支持高阶综合等流程的质量优化，推动前端设计向自主智能演进
- 适合关注智能EDA与代理型AI的芯片研发人员参考
随着芯片复杂度上升和上市压力加大，前端设计已成为芯片开发的关键瓶颈。近年来，大语言模型（LLMs）在电子设计自动化（EDA）领域展现出巨大潜力。除了理解设计规格外，LLMs 还有望成为硬件描述语言（HDL）生成、测试平台构建及设计空间探索的统一智能接口。以 OpenClaw 等开创性系统为代表的代理型 AI 的兴起，为下一代 EDA 提供了战略路径。本文探讨了 EDA 从局部辅助向自主代理执行的演进，并综述了 LLM 在前端设计中的代表性进展，重点关注从统一规格生成电路与测试平台，以及在高阶综合等成熟流程中提升设计质量的关键任务。最后，分析了集成 LLM 到 EDA 的主要挑战与局限，并展望未来机遇，为希望利用代理型 AI 技术推进前端设计的研究者提供系统性视角。
原文摘要 · Abstract (English)
As chip complexity increases and time-to-market pressures grow, front-end design has become a critical bottleneck in chip development. Recently, Large Language Models (LLMs) have shown great potential in Electronic Design Automation (EDA). Beyond specification understanding, LLMs show the potential to serve as a unified intelligent interface for hardware description language (HDL) generation, testbench construction, and design space exploration. The rise of agentic AI, represented by pioneering systems such as OpenClaw, offers a strategic roadmap for the next generation EDA. From this perspective, this paper discusses the evolution of EDA from localized assistance to autonomous agentic execution. Then, we review representative advances of LLMs in front-end design, focusing on key tasks such as circuit and testbench generation from a shared specification, as well as design quality improvement in established workflows such as high-level synthesis. Finally, we discuss the key challenges and limitations of integrating LLMs into EDA, and outline future opportunities for advancing LLM-enabled front-end design, offering a systematic perspective for researchers interested in leveraging agentic AI technologies for EDA.
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