arXiv:2607.19768cs.LGcs.AR2026-07中稿 · publication in the…

用大模型动态优化芯片布线,显著降低拥堵和线长。

AlphaRoute: Large Language Models as Semantic Optimizers for Multi-Objective Routing

论文配图:AlphaRoute: Large Language Models as Semantic Optimizers for Multi-Objective Routing
图 1 · 摘自论文原文
  • 用大模型解析拥堵信息,动态调整惩罚参数以指导布线。
  • 在MEMPOOL上减少98.6%的溢出,在ARIANE设计中溢出降为146,109。
  • 适合需要高精度布线优化的芯片设计工程师使用。

超大规模集成电路(VLSI)全局布线是典型的NP难组合优化问题,需在容量受限的3D网格中分配信号网络,同时最小化拥塞、线长和过孔数量。传统启发式方法依赖静态惩罚策略,在复杂拥塞拓扑下表现不佳。本文提出AlphaRoute:一种多目标自适应搜索框架,将重布线(R&R)重构为动态优化系统。引入基于SHAP的溢出分解,定位每条网络的拥塞来源,通过3D Dijkstra迷宫布线提取目标子图,并采用自适应PathFinder策略。关键创新在于使用大语言模型(LLMs)作为语义策略优化器,其在确定性知识图谱约束下解读拥塞指标,动态调整惩罚参数。在ISPD 2025基准测试中,AlphaRoute在MEMPOOL上实现98.6%的溢出降低;在受限的ARIANE设计中,溢出降至146,109(相比现有最优水平降低29.8倍),惩罚得分从原方案0.0538降至现有最优的1.780。结果表明,优越的算法搜索结构可克服解释型Python实现的延迟瓶颈。

原文摘要 · Abstract (English)

Very Large Scale Integration (VLSI) global routing is an NP-hard combinatorial optimization problem requiring signal net assignment across capacity-constrained 3D grids while minimizing congestion, wirelength, and via transitions. Because traditional heuristics rely on static penalty schedules that fail on complex congestion topologies, we present AlphaRoute: a multi-objective adaptive search framework reformulating rip-up and reroute (R&R) into a dynamic optimization system. We introduce SHAP-based overflow decomposition to isolate per-net congestion, driving targeted subgraph extraction via 3D Dijkstra maze routing and an adaptive PathFinder policy. Crucially, AlphaRoute employs Large Language Models (LLMs) as semantic policy optimizers. Bounded by a deterministic knowledge graph, the LLMs interpret congestion metrics to dynamically adjust penalty parameters. Evaluated on ISPD 2025 benchmarks, AlphaRoute reduces overflow by 98.6% on MEMPOOL. On the constrained ARIANE design, we achieve an overflow of 146,109 (a 29.8x reduction in overflow over the state of the art), yielding a penalized score of S_orig = 0.0538 versus the State-of-the-art (SOTA) 1.780. These results demonstrate that superior algorithmic search geometry can overcome the latency of interpreted Python implementations.

芯片设计大模型布线优化多目标

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