用内存计算加速博弈搜索，能效比传统芯片高96倍。
Multi-primitive in-memory computing for Monte Carlo tree search
- 将搜索过程拆解为硬件原生操作，实现全芯片运行
- 9×9围棋每步仅耗60毫瓦，能效超CPU96倍
- 通用架构支持多类AI应用，适合边缘部署
蒙特卡洛树搜索（MCTS）使人工智能具备决策能力，但传统处理器上功耗达55-300瓦，限制了边缘部署。内存计算（IMC）在常规任务中能效高，但被认为不适用于不规则的多阶段算法。本文提出“阶段到原语分解”方法，将每个算法阶段重构为硬件原生的IMC原语：选择、扩展、模拟和反向传播分别映射至内容寻址存储器、组合逻辑、电阻式随机存取存储器（RRAM）交叉阵列和静态随机存取存储器，实现搜索全程在芯片内完成。基于22纳米工艺与实测RRAM阵列参数，IMC-MCTS在9×9围棋任务中功耗约60毫瓦，相较中央处理器（CPU）能效提升96倍，较H100 GPU提升65至2,059倍。其水平达到欧洲围棋联合会评级，在样本量不确定范围内与开源围棋引擎（Pachi-UCT和Michi-C）相当。相同硬件可运行四大领域共八个不同应用。
原文摘要 · Abstract (English)
Monte Carlo tree search (MCTS) enables artificial intelligence (AI) decision-making, but requires 55-300 W on conventional processors, limiting edge deployment. In-memory computing (IMC) is energy-efficient on regular workloads but has been considered incompatible with irregular multi-phase algorithms. We introduce phase-to-primitive decomposition, which reformulates each algorithmic phase as a hardware-native IMC primitive. Applied to MCTS, selection, expansion, rollout and backpropagation map to content-addressable memory, combinational logic, a resistive random-access memory (RRAM) crossbar and static random-access memory, keeping search on chip. At 22 nm with fabricated RRAM-array parameters, IMC-MCTS consumes ~60 mW for 9x9 Go, achieving 96x energy efficiency over a central processing unit (CPU) and 65x-2,059x over an H100 graphics processing unit (GPU). It reaches a European Go Federation rating within sample-size uncertainty of open-source Go engines (Pachi-UCT and Michi-C). The same substrate runs eight applications across four AI domains.
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