用大模型自动生成离子阱量子计算移动编译器,效率提升超70%。
Efficient LLM-Generated Shuttling Compilers for Complex Trapped-Ion Architectures
- 用大语言模型从说明文档直接生成完整编译器代码,逐步扩展到复杂架构。
- 在多段线性阱上减少76%移动步数,在有连接点的结构上减少39%。
- 适用于新型离子阱架构,可将开发周期从月级缩短至天级。
离子阱量子计算机依赖移动编译器,将算法转化为离子量子比特在特定架构内的移动序列。本文首次使用前沿大语言模型Claude Opus 4.7,从文字说明中自动生成并迭代优化完整的Python编译器代码。研究从(i)线性分段阱开始,扩展至(ii)含连接点的阱结构,最终实现(iii)广泛连通阱图的高效编译。后继编译器以先前版本代码为起点。在通用量子电路基准测试中,与现有手工编译器对比,(i)场景最多减少76%移动步数,(ii)场景最多减少39%。对于(iii)自由连通架构,移动步数差异显著:高连接度、多连接点的结构相比走廊型结构降低一个数量级。使用第二款大模型Claude Fable 5重复实验,结果一致,且在最大电路上更常优于手工编译器。结果表明,无需额外算法工程,未修改的前沿大模型即可生成正确、高效且具有竞争力的编译器,将新架构开发时间从数月缩短至数日。
原文摘要 · Abstract (English)
Trapped-ion quantum computers rely on shuttling compilers, which cast an input algorithm into a sequence of ion-qubit movements within a given architecture. We present the first study in which a single frontier large language model (LLM), Claude Opus 4.7, generates and iteratively refines the full Python code of shuttling compilers from written specifications. We start with a compiler for (i) a linear segmented trap, extend it to (ii) a trap with junctions, and finally achieve efficient compilation for (iii) a broad class of connected trap graphs. The compilers for the more general cases are seeded with code from the previous ones. We benchmark the LLM-generated compilers against state-of-the-art hand-crafted ones using a common suite of quantum circuits. The number of shuttling timesteps is reduced by up to 76% for (i) and up to 39% for (ii). For the broad case (iii) of freely connected architectures, we find large variations in the required number of shuttling timesteps, depending on the connectivity. A densely connected, junction-rich architecture yields an order-of-magnitude reduction in shuttling timesteps compared to a corridor-like one. Repeating the complete generation and evaluation with a second frontier LLM, Claude Fable 5, reproduces these findings, with the Fable 5 compilers surpassing the hand-crafted ones more often on the largest circuits. Our results show that an unmodified frontier LLM can produce working, correct, and competitive shuttling compilers without additional manual algorithmic engineering, thus reducing the development time for new architectures from several months to a few days.
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