让AI像人一样探索电路时序，实现100%功能正确
VeriTrace: Human-Like Temporal Exploration Completes Agentic Action Space
- 构建完整时序探索能力，可自由选择信号、时间窗口和迭代深度
- 在VerilogEval-V2上达到100%通过率，首次实现完全正确
- 适合需要高可靠性的硬件验证场景，尤其擅长复杂错误定位
大型语言模型在自动Verilog RTL生成方面展现出潜力，但当前最先进的多智能体系统在标准基准测试上的准确率仅约95%。我们发现这一瓶颈源于不完整的调试动作空间：现有系统限制智能体可检查的信号、可查询的时间窗口，或两者兼有，使调试退化为基于预设视图的模式匹配，而非假设驱动的根本原因分析。本文提出VeriTrace，其检查智能体具备完整的调试动作空间，可独立控制信号选择、时间窗口范围和迭代深度。这种能力称为“代理时序探索”，使智能体能形成故障假设，查询波形数据验证，迭代优化理解，模拟人类验证工程师的探索过程。VeriTrace在VerilogEval-V2上实现100% Pass@1，是首个达成此表现的系统。在共享Claude Sonnet 4.0骨干网络下，相比最强复现基线提升5.1%，证明调试自主性可弥合最后一道准确率差距。
原文摘要 · Abstract (English)
Large language models have shown promise for automated Verilog RTL generation, yet state-of-the-art multi-agent systems plateau at ~95% accuracy on standard benchmarks. We trace this ceiling to an incomplete debugging action space: existing systems restrict which signals the agent can inspect, which time windows it can query, or both, reducing debugging to pattern matching on a narrow, predetermined view of circuit behavior rather than hypothesis-driven root-cause analysis. We present VeriTrace, a multi-agent system whose Inspector agent operates over a complete debugging action space, with independent control over signal selection, time-window bounds, and iteration depth. This capability, which we term Agentic Temporal Exploration, enables the agent to form hypotheses about failure causes, query the waveform for evidence, and refine its understanding iteratively, mirroring the exploratory process of human verification engineers. VeriTrace achieves 100\% Pass@1 on VerilogEval-V2, the first system to attain perfect functional correctness on this benchmark. On a shared Claude Sonnet 4.0 backbone, VeriTrace outperforms the strongest reproduced baseline by +5.1%, demonstrating that debugging agency closes the final accuracy gap.
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