用大模型加速RISC-V指令扩展开发，自动完成代码生成与验证。
LACE: Large Language Model Aided Multi-Agent Framework for Agile RISC-V Instruction Extension
- 基于大模型的多智能体框架，将自然语言需求转为两级中间表示。
- 在4个嵌入式RISC-V核上实现72.8%的首次生成通过率，显著提升效率。
- 适合芯片架构师和定制化指令开发者，降低开发门槛。
领域特定指令集架构扩展（ISAX）广泛用于RISC-V生态以加速新兴工作负载，但跨核心的ISAX实现与验证仍缓慢且碎片化。现有框架需针对每种核心进行接口适配，且微架构或ISAX变更后差异测试常失效。我们提出LACE，一个基于大语言模型的多智能体工作流：将自然语言的ISAX意图转换为紧凑的两级中间表示（操作级与HDL任务级），在大型代码库中执行检索引导的局部RTL修改，并通过编译器无关的riscv-formal检查流程闭环验证（假设支持RVFI或可仪器化）。在四个嵌入式RISC-V核心上的评估显示，LACE将首次生成通过率从接近零提升至72.8%，同时改善代码定位并减少集成返工。LACE代码已开源：https://github.com/UMN-ZhaoLab/LACE。
原文摘要 · Abstract (English)
Domain-specific Instruction Set Architecture eXtensions (ISAX) are widely adopted in the RISC-V ecosystem to accelerate emerging workloads, but implementing and validating ISAXes across different cores remains slow and fragmented. Existing frameworks still require per-core interface adaptation, and differential testing often breaks once either the microarchitecture or the ISAX changes. We present LACE, an LLM-aided multi-agent workflow that translates natural-language ISAX intents into a compact two-level IR (operation-level and HDL task-level), performs retrieval-guided localized RTL edits over large repositories, and closes the loop with a compiler-agnostic riscv-formal checking flow (assuming RVFI availability or instrumentation). Across four embedded RISC-V cores, LACE raises pass@1 generation accuracy from near-zero to 72.8\% within our evaluation setup, while improving code localization and reducing integration rework. The code of LACE is available at https://github.com/UMN-ZhaoLab/LACE.
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