构建工业光刻缺陷理解多任务评测基准，推动大模型从检出到根因分析的落地。
LDU-Bench: Multimodal LLM Evaluation for Lithography Defect Understanding under Layout-Varying Circuit Backgrounds
- 分解光刻审查流程为四类任务，构建真实场景多模态评测集。
- 现有大模型仅能可靠完成缺陷分类，下游定位与成因推理能力严重不足。
- 提供可量化、可诊断的评估体系，适合芯片制造与AI模型研发者使用。
多模态大语言模型在工业异常检测中展现出强大的缺陷识别能力。然而，在光刻审查中，仅判断图像是否含缺陷不足以支撑工程检验；模型还需理解缺陷形貌、空间位置及由可见证据支持的潜在成因。为此，本文提出LDU-Bench，一个面向光刻缺陷理解的多任务多模态评测基准。该基准基于真实光刻与集成电路审查图像，将审查流程拆解为四个独立任务：缺陷分诊、形貌识别、粗略定位和图像条件下的成因分析。通过任务级指标、诊断性输出和光刻闭环评分（LCS）系统评估模型性能。实验表明，尽管现有多模态大模型可相对可靠地完成缺陷分诊，但该能力无法稳定迁移至下游审查阶段。形貌对齐、有效定位和证据到成因映射仍是主要瓶颈。进一步诊断显示，这种能力断层并非单一指标波动，而是跨语义层级结构化理解不足所致。总体而言，LDU-Bench为工业多模态大模型在光刻审查链中的可用性、失效点与能力边界提供了可量化、可诊断的统一平台。
原文摘要 · Abstract (English)
Multimodal large language models have demonstrated strong defect recognition capability in industrial anomaly detection. However, in lithography review, merely determining whether an image contains a defect is insufficient for engineering inspection; models must also understand defect morphology, spatial location, and the potential causes supported by visible evidence. To this end, this paper proposes LDU-Bench, a multi-task multimodal benchmark for lithography defect understanding. Constructed from real lithography and integrated-circuit review images, LDU-Bench decomposes the review workflow into four independent tasks: defect triage, morphology recognition, coarse localization, and image-conditioned cause analysis. It systematically evaluates models using task-level metrics, diagnostic readouts, and the Lithography Closure Score (LCS). Experimental results show that although existing MLLMs can perform defect triage relatively reliably, this ability does not stably transfer to downstream review stages. Morphology alignment, effective localization, and evidence-to-cause mapping remain the major bottlenecks. Further diagnostics indicate that this capability break is not a fluctuation of a single metric, but reflects insufficient structured understanding across semantic levels. Overall, LDU-Bench provides a quantifiable and diagnostic unified platform for evaluating the usability, failure points, and capability boundaries of industrial MLLMs in lithography review chains.
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