为微控制器间歇学习设计节能神经网络,无需反复测试即可优化
Design-Time Optimization of Deep Neural Networks for Intermittent Learning on Microcontrollers
- 结合硬件能耗预测与多目标优化,设计阶段完成网络优化
- 在Cortex-M4上实现16.6%误差率的逐层能耗预测,支持可靠架构选择
- 适合边缘设备上能量自给、断续学习的AI应用开发者
我们提出一种面向微控制器(MCU)上间歇性、能源自给型本地学习的深度神经网络(DNN)设计方法。在太阳能供电等场景中,能量可能随时耗尽,导致学习过程被中断。本方法将硬件感知的能耗预测模型与多目标优化(MOO)结合,可在设计阶段离线优化DNN,无需在目标MCU上反复部署和在线测试。所提出的能耗预测器基于DNN模型提取的计算与内存特征,估算每层在推理和训练中的能耗,包括间歇性检查点开销。我们在Cortex-M4 MCU上使用自编码器进行异常检测验证,预测误差为加权绝对百分比误差16.6%,足以在间歇性约束下实现可靠的架构选择。该工作弥合了多目标优化、自动化DNN设计、能量采集系统部署与间歇学习之间的鸿沟,真正实现边缘端自主AI。
原文摘要 · Abstract (English)
We present a method for designing deep neural networks (DNNs) for intermittent, energy-autonomous, on-device learning on microcontroller units (MCUs). In mobile applications where the energy can run out, e.g., when solar-powered, executing artificial intelligence (AI) faces a technical issue as learning can be interrupted at any time. Our approach combines a hardware-aware energy prediction model with multi-objective optimization (MOO), enabling offline DNN optimization at the design stage without repeated deployment and online testing on the target MCU. Our proposed energy predictor estimates per-layer energy consumption for both DNN inference and training, including the intermittent checkpointing overhead, based on implementation-specific compute and memory features extracted from the DNN model. We validate our approach using autoencoders for anomaly detection on a Cortex-M4 MCU, where our predictor achieves a weighted absolute percentage error of 16.6%, which is sufficient for reliable architecture selection under intermittency constraints. As a result, this work bridges the gap between MOO, automated DNN design, deployment on energy-harvesting systems, and intermittent learning, truly enabling autonomous AI at the edge.
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