用大模型+搜索算法，高效优化芯片设计，省时36%以上。
MicroEvo: Knowledge-Guided LLM Sampling for Efficient Microarchitecture Design Space Exploration
- 结合大模型与树搜索，智能生成芯片设计方案。
- 相比传统方法，优化质量提升36.2%，效率高10.6倍。
- 适合芯片设计、自动化系统优化等领域的研究人员。
微架构设计空间探索面临搜索空间庞大和昂贵的PPA评估问题，导致可用于设计决策的仿真预算有限。现有方法缺乏对微架构依赖关系的考虑，无法有效学习迭代搜索过程，造成评估浪费且帕累托收敛性差。本文提出MicroEvo，一种知识引导框架，将现成大语言模型（LLM）与蒙特卡洛树搜索（MCTS）结合，用于多目标微架构优化。该框架包含：基于大模型的进化算子、兼顾帕累托贡献与多样性的树策略、主动积累优化知识的机制，以及实时适应搜索行为的状态感知指令。实验表明，MicroEvo在帕累托前沿质量上比NSGA-II最高提升36.2%，搜索效率提高10.6倍，并在复杂工业级核心上展现出良好可扩展性。代码已公开于：https://github.com/GEAR-SEU/MicroEvo-ICCAD-26。
原文摘要 · Abstract (English)
Microarchitecture design space exploration suffers from expansive search spaces and expensive PPA evaluation, leaving only a small simulation budget for design decision-making. Existing methods perform blind search without considering microarchitectural dependencies and fail to learn from the iterative search effectively, leading to wasted evaluations and weak Pareto convergence. In this paper, we propose MicroEvo, a knowledge-guided framework that couples off-the-shelf LLMs with Monte Carlo Tree Search (MCTS) for multi-objective microarchitecture optimization. MicroEvo combines LLM-driven evolutionary operators, a Pareto-aware tree policy that balances Pareto contribution and diversity, an active knowledge accumulation mechanism that extracts and reuses optimization insights, and state-aware directives that adapt the search behavior online. Experiments show that MicroEvo improves Pareto-front quality by up to 36.2% over NSGA-II and achieves 10.6x higher search efficiency, and also demonstrates strong scalability to a complex industrial-scale core. The code repository is available at: https://github.com/GEAR-SEU/MicroEvo-ICCAD-26.
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