利用概率电路的层次结构提升分布外检测精度，无需额外训练数据。

Probabilistic Circuits (PCs) are tractable generative models whose internal nodes encode a hierarchy of probabilistic summaries over different variable scopes. Existing PC-based out-of-distribution (OOD) detection methods ignore this hierarchy, reducing the entire circuit to the scalar likelihood (or its uncertainty) computed at the root. We introduce Hierarchical Likelihood Vector (HLV), a representation whose entries are the likelihoods associated with selected PC nodes and define the Hierarchical Likelihood Distance (HLD), a PC-induced pseudo-metric that compares the probability distributions through the expectations of their HLVs. We show that HLD is an integral probability metric over a function class naturally induced by the PC and develop a principled goodness-of-fit hypothesis test for unsupervised OOD detection. Unlike existing approaches, the trained PC alone serves as the representation of the in-distribution: no held-out in-distribution data are required at deployment. We further show that the quantities required by the hypothesis test can be computed exactly, directly from the trained circuit, yielding an approximate analytic decision threshold. Experiments on tabular and MNIST datasets demonstrate that exploiting the hierarchical probabilistic summaries encoded through the PC improve OOD detection over root-likelihood, uncertainty-, typicality- and kernel-based baselines, while naturally localizing distribution shifts to the PC nodes responsible for the shift.