用轻量混合模型提升开源芯片设计中的布线前延迟预测精度
Hybrid ML for Lightweight Pre-Route Delay Estimation in Open-Source IC Design
- 结合决策树与线性回归，构建轻量级混合机器学习模型
- 误差比原工具降低80%，且无需专用参数仍提升71%
- 模型体积小300倍、速度快2倍，适合资源受限场景
静态时序分析（STA）是数字集成电路设计流程中的关键步骤，但在缺乏物理设计信息的情况下，准确估算延迟仍具挑战。为此，本文提出一种轻量级混合机器学习方法，将决策树与线性回归结合，用于改进开源RTL-to-GDSII工具OpenLane生成的布线前延迟估计。所提模型相较OpenLane原估计误差降低80%，即使不使用OpenLane专属参数，也实现71%的性能提升。该方法不仅精度更高，且模型规模小于传统延迟传播技术与复杂机器学习模型的300倍以上，速度提升2倍，并具备更强可解释性。
原文摘要 · Abstract (English)
Static Timing Analysis (STA) is a critical step in the design flow of digital integrated circuits, however, obtaining accurate delay estimations can represent a challenge when limited information regarding physical design is available. In response, this work presents a hybrid and light-weight machine learning (ML) based approach that combines a decision tree with linear regression to improve pre-routing delay estimations generated by the open-source RTL-to-GDSII tool OpenLane. The proposed model achieves an 80\% reduction in error compared to OpenLane's estimates, demonstrates a 71\% improvement even without utilizing OpenLane-specific parameters. Overall, this method offers an alternative to traditional delay propagation techniques and more complex machine learning models that is not only accurate, but is also over 300 times smaller, 2 times faster and offers a higher explainability.
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