在无源码情况下优化AMD GPU二进制代码，实现性能提升且功能不变。
AsmEvo: Agentic Assembly-Level Optimization of AMD GPU Kernels with Functional Equivalence Verification
- 用智能体逐行改写已编译的AMD GPU二进制代码，保持接口兼容。
- 在MI308X上使29个核函数平均提速1.35倍，最高达3.88倍。
- 适合部署后优化生产级GPU代码，尤其适用于无源码场景。
高性能机器学习系统越来越依赖于无法获取源码、由生成器产出或与最终机器码差距过大的GPU内核。现有基于大模型的内核优化器和自动调优工具主要针对CUDA、Triton、HIP或张量编程源码，且以参考实现作为验证基准。本文研究更严格场景：对已编译的AMDGPU代码对象进行优化，此时部署的二进制文件是唯一的功能行为参照。我们提出AsmEvo，一种面向AMD GPU内核的智能体式汇编级优化框架。给定一个AMDGPU代码对象K0，AsmEvo重构可重汇编表示，通过长程智能体提出低级修改，重建保持ABI兼容的优化代码，并仅在相同运行条件下经差分验证通过后才接受候选方案。AsmEvo结合了代码对象恢复、元数据感知重建、性能引导的热区编辑、正确性约束的时序评估以及保守的原地补丁回退策略。我们在多种AMD GPU内核上进行了广泛实验。在MI308X上，AsmEvo优化了所选的30个KernelBench内核中的29个，几何平均加速比达1.35倍，最大加速比达3.88倍。在MI300X生产负载上，其优化所有评估的AITer二进制文件及vLLM/SGLang的Triton汇编内核，几何平均/最大加速比分别为1.09×/1.31×和1.18×/1.34×，同时保证功能等价。
原文摘要 · Abstract (English)
High-performance ML systems increasingly rely on GPU kernels whose editable source is unavailable, generated, or too distant from final machine code to expose remaining optimizations. Existing LLM kernel optimizers and autotuners mainly operate on CUDA, Triton, HIP, or tensor-program source and validate against reference implementations. We study a stricter setting: optimizing an already compiled AMDGPU code object, where the deployed binary is the only behavioral oracle. We present AsmEvo, an agentic assembly-level optimizer for AMD GPU kernels. Given an AMDGPU code object K0, AsmEvo reconstructs a reassemblable representation, proposes low-level edits with a long-horizon agent, rebuilds an ABI-preserving optimized object, and accepts candidates only after differential verification against K0 under identical launches. AsmEvo combines code-object recovery, metadata-aware rebuilding, profiling-guided hot-window editing, correctness-gated timing, and conservative in-place patch fallback. We conduct extensive experiments with AsmEvo on various AMD GPU kernels. On MI308X, AsmEvo improves 29 of 30 selected KernelBench kernels, reaching 1.35x geometric-mean and 3.88x maximum speedup. On MI300X production workloads, it improves all evaluated AITer binaries and vLLM/SGLang Triton assembly kernels, reaching 1.09x/1.31x and 1.18x/1.34x geometric-mean/maximum speedups, respectively, while preserving functional equivalence.
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