用自定义语言直接生成神经形态硬件，无需写代码即可加速生物仿真和求解任务。
Syn2Logic: End-to-End Neuromorphic Design Automation
- 用领域专用语言建模神经行为，自动编译为可综合的硬件代码
- 实现比现有模拟器快的线虫加速器，破解经典难题效率超主流工具
- 在小型FPGA上达成560万帧每瓦性能，适用于高效能神经形态计算
本文提出电子神经形态设计自动化（eNDA）的新视角，将其视为连接计算神经科学建模与传统电子设计自动化（EDA）流程的桥梁。我们引入术语并展示其实现方式，设计原型框架Syn2Logic。该框架允许神经科学家使用自定义领域特定语言（DSL）描述神经行为，并通过编译器将模型自动转换为可综合的寄存器传输级（RTL）硬件。实验表明，仅需模型描述而无需编写硬件描述语言（HDL）代码，即可：(i) 生成我们认为是最快且运行速度显著超越当前最先进模拟器的C. elegans加速器；(ii) 构建迄今最快、最通用的神经形态数独求解器，在TOP1465数据集上优于CP-SAT与SCIP；(iii) 在微型FPGA上实现560万帧/瓦的加速器，于MNIST数据集上在速度与能效方面均超越现有神经形态架构。
原文摘要 · Abstract (English)
In this work, we propose a view on electronic Neuromorphic Design Automation (eNDA), which we see as a design automation flow that bridges computational neuroscience modeling with traditional Electronic Design Automation (EDA) flow. We introduce the term, give examples of how it can be implemented, and design a prototype implementation: Syn2Logic. Syn2Logic is an entire eNDA framework, that allows neuroscientists to model neural behavior using a custom DSL and a compiler that takes the same model description down to synthesizable RTL hardware. We end the paper by applying the eNDA-flow through Syn2Logic to show how to -- without writing a single line of hardware description language (HDL) code-- (i) generate what we believe is the fastest C. elegans accelerator that runs significantly faster than state-of-the-art simulators, (ii) create (to the best of our knowledge) the fastest, most generic neuromorphic sudoku solver that outperforms CP-SAT and SCIP on TOP1465 puzzles, and (iii) create a 5.6 million FPS/Watt accelerator on a tiny FPGA that outperforms existing neuromorphic architectures in terms of speed and energy-efficiency on the MNIST dataset.
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