用大模型自动分配任务到FPGA或CPU,提升性能与能效
Gen-TAS: A Generative AI-Aided Hardware-Software Task Allocation Framework for FPGA-GPP Heterogeneous Systems

- 基于任务图与检索增强生成,结合历史数据生成决策策略
- 在延迟优先时提速最高达92.53倍,兼顾通信与资源开销
- 适合需要快速部署FPGA加速的工程师和系统设计者
FPGA-GPP异构系统结合了软件灵活性与可重构硬件的性能与能效优势。然而,在不同用户目标(如延迟、通信、资源利用率、功耗)下,确定任务应由GPP还是FPGA执行,需大量专业知识和设计空间探索。本文提出Gen-TAS,一种基于知识的LLM框架,实现用户定制化的FPGA-GPP任务分配。通过任务图分析与RAG技术,将大模型推理锚定在历史实现知识中,生成多个可解释的优化策略。人机协同选择后,通过确定性后端将决策映射为可复现的FPGA SoC实现。在CNN和SDR工作负载上,多种大模型实验表明,所提方法能稳定响应需求驱动分配。在延迟优先目标下,相比全GPP基线,分别实现最高2.45倍和92.53倍加速;其他目标则在加速性能与通信、资源利用或FPGA功耗间进行权衡。
原文摘要 · Abstract (English)
FPGA-GPP heterogeneous systems combine software flexibility with the performance and energy efficiency of reconfigurable hardware. However, determining which application tasks should execute on the GPP or FPGA requires extensive expertise and design-space exploration, particularly when user objectives vary across latency, communication, resource utilisation, and power. This paper proposes Gen-TAS, a knowledge-grounded LLM framework for user-specific FPGA-GPP task allocation. By combining task-graph analysis with RAG, Gen-TAS grounds LLM reasoning in historical implementation knowledge and generates multiple explainable strategies tailored to the specified objectives. Human-in-the-loop selection and a deterministic backend connect LLM-generated decisions to reproducible FPGA SoC implementations. Experiments on CNN and SDR workloads across multiple LLMs demonstrate stable, requirement-driven allocation. Under latency-oriented objectives, implementations following the selected strategies achieve speedups of up to 2.45$\times$ and 92.53$\times$, respectively, relative to the corresponding all-GPP baselines while other objectives select strategies that trade some acceleration performance for FPGA-GPP communication, resource utilisation, or FPGA power.
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